1. Field of the Invention
The present invention relates to a method and computer program device for managing the assignment of base and alias addresses for an I/O device. In particular, the present invention relates to a method and computer program device utilizing performance data to dynamically manage the allocation of parallel I/O access capabilities enabled by the assignment of base and alias I/O addresses.
2. Description of Related Art
FIG. 1 illustrates a hardware environment of a channel subsystem 2 included in a host system 4 providing communication between CPUs 6a, b and I/O devices 10a, b, c. A storage controller 8 controls access to the I/O devices 10a, b, c. The host system 4 communicates with the storage controller 8 via the channel subsystem 2 and subchannels 14a, b, c therein. The host system 4 includes CPUs 6a, b that contain the sequencing and processing facilities for instruction execution, interruption action, timing functions, initial program loading, and other machine-related functions. The CPUs 4a, b may be host systems. The I/O devices 10a, b, c may be comprised of printers, magnetic-tape units, direct-access-storage devices (DASDs), displays, keyboards, communications controllers, teleprocessing devices, and sensor-based equipment. The storage controller 8 regulates and controls data transfers to the I/O devices 10a, b, c. The storage controller 8 function may be a separate stand alone machine, such as the IBM 3990 Storage Controller, or housed within the I/O device 10a, b, c or within the host system 4. In certain systems, the host system 4 may view the storage controller 8 as a multitude of separate control unit images or logical subsystems (LSSs), wherein each control unit provides access to a particular I/O device 10a, b, c. 
The CPUs 6a, b and the channel subsystem 2 may access a main storage 12. Programs and data maintained in the I/O devices 10a, b, c such as storage drives, must be loaded into the main storage 12 before the CPUs 6a, b can process such programs and data. The main storage 12 may include a fast access buffer or cache. I/O operations involve the transfer of data between the main storage 12 and the I/O devices 10a, b, c. The channel subsystem 2 directs the flow of data between the storage controller 8 and the main storage 12. The channel subsystem 2 relieves the CPUs 6a, b of handling I/O operations and permits the CPUs 6a, b to devote processing cycles to other operations while the channel subsystem 2 concurrently handles data transfers. In typical implementations, the CPUs 6a, b, the main storage 12, and the channel subsystem 2 are all located within a single host 4 that is attached to a single storage controller 8, such as the IBM 3990 Storage Controller.
Channel paths 12 provide data communication between the channel subsystem 2 and the storage controller 8. The channel paths 12 may employ a parallel-transmission protocol or a serial-transmission protocol. The storage controller 8 includes control logic to physically access the I/O devices 10a, b, c and control data transfer. In preferred embodiments, multiple channel paths 12 may be dedicated for communication with a particular I/O device 10a, b, c. 
A subchannel 14a, b, c is dedicated to each I/O device 10a, b, c accessible to the channel subsystem 2, i. e., there is a one-to-one relationship between subchannels 14a, b, c and I/O devices 10a, b, c. Each subchannel 14a, b, c consists of internal storage and includes information relating the I/O devices 10a, b, c to the channel subsystem 2. The channel subsystem 2 uses the information in the subchannels 14a, b, c to access the I/O devices 10a, b, c. The subchannels 14a, b, c are assigned to the I/O devices 10a, b, c at initialization. The subchannels 14a, b, c maintain information such as the channel command word (CCW), channel-path identifier, device number, etc., concerning operations initiated with respect to the I/O device 10a, b, c represented by the subchannel 14a, b, c. I/O devices 10a, b, c that are attached to the channel subsystem 2 by multiple channel paths 12 may be accessed using any of the available channel paths 12. An I/O device 10a, b, c is addressed by channel-path identifiers (CHPIDs) identifying the path to a device, subchannel numbers identifying the subchannel 14a, b, c associated with the device, and a device number uniquely identifying the I/O device 10a, b, c to the host system 4. The IBM S/390 operating system allows for dynamic-reconnection, wherein the storage controller 8 may select any channel path 12 leading to the host system 4 when logically reconnecting to the channel subsystem 2.
The main storage 12 includes unit control blocks (UCBs) which include information on the subchannels and I/O devices. The CPUs 6a, b may access the UCB information when initiating I/O operations.
The channel subsystem 2 may receive numerous I/O operations from CPUs 6a, b directed toward the I/O devices 10a, b, c. The channel subsystem 2 initiates a channel program which comprises a series of channel commands to access and perform the I/O operation requested by the host system 4. An I/O operation toward a volume operates through the execution of a series of linked channel command words (CCW). The CCW designates the storage area associated with the operation, the action to be taken whenever transfer to or from the area is completed, and other options. A CCW command includes different fields, including: a command code that specifies the operation to be performed, e.g., write, read, read backward, control, sense, sense ID, and transfer in channel; and an address field designating a location in absolute storage, otherwise referred to as a data storage address of where the I/O operations and commands are maintained in main memory 12, and chain command information specifying whether commands are chained together. With each chain of commands, a define extent command may be provided indicating the permissible I/O operations that may be performed and a locate record command indicating the actual I/O operation to be performed. The chain of CCW commands may operate within the defined extent range. A description of these commands is provided in the IBM publication, xe2x80x9cIBM 3990/9390 Storage Control Reference,xe2x80x9d IBM Document no. GA32-0274-04 (Copyright IBM, 1994, 1996), which publication is incorporated herein by reference in its entirety.
A subchannel 14a, b, c establishes an active allegiance for a channel path when active communication is initiated with the I/O device 10a, b, c on the channel path. In current systems, the subchannel 14a, b, c can have an active allegiance to only one channel path at a time. While a subchannel 14a, b, c has an active allegiance on a channel path 12 to an I/O device 10a, b, c, the channel subsystem 2 does not actively communicate with that device on any other channel path. Thus, there is only one path of communication, and hence one channel program, directed toward an I/O device 10a, b, c at a given time even though there may be multiple dynamic channel paths 12 leading to the I/O device 10a, b, c. Although dynamic channel pathing provides multiple paths from the channel subsystem 2 to the storage controller 8, only one of the dynamic paths is used at a time to communicate with the I/O device 10a, b, c. The dynamic paths are used to provide an alternative path for reconnecting the storage controller 8 and the I/O device 10a, b, c to the host system 4. In preferred embodiments, the storage controller 8 selects the path for reconnection. In the prior art, execution of a channel program for a single host system along multiple paths would likely create device-busy conditions detectable by the channel subsystem and cause unpredictable results.
Thus, with prior art servers employing the channel subsystem architecture of the IBM ESA/390 server and other similar server systems known in the art, a single host system cannot direct concurrent, multiple I/O operations toward the same volume, i. e., I/O device. In the current art, to execute multiple channel programs toward the same I/O device 10a, b, c, the channel program operations must be queued and executed serially; multiple channel programs cannot be executed at once toward the same I/O device 10a, b, c. Otherwise, if the multiple I/O tasks return data from the same device to a single host, then the host could not relate the data to the completed I/O task because the host cannot distinguish on the basis of the single base address for the target I/O device 10a, b, c. Prior art systems are described in the IBM publications xe2x80x9cESA/390 Principles of Operation,xe2x80x9d IBM document no. SA22-7201-04 (IBM Copyright 1990, 1991, 1993, 1994, 1996, 1997), and U.S. Pat. No. 5,197,069, entitled xe2x80x9cMethod and System for Detecting and Recovering from Switching Errors,xe2x80x9d assigned to IBM, which publications and patent are incorporated herein by reference in their entirety.
For the foregoing reasons, there is a need to create and manage parallel access to shared I/O devices.
The present invention is directed to a method of managing parallel access to shared I/O devices, where parallel access is enabled by the use of base and alias addresses to access an I/O device. Parallel access is managed by allocating the alias addresses.
In particular, it is an object of the present invention to utilize performance data to allocate alias addresses.
It is a further object of the present invention to allocate alias addresses in a way designed to improve the efficient utilization of a shared I/O device, by collecting and analyzing performance data relating to the utilization of the shared I/O device.
It is a still further object of the present invention to allocate alias addresses in a way designed to allocate resources to high importance tasks (organized into service classes), by collecting and analyzing data relating to the performance of service classes relative to processing goals assigned to the classes.
It is a still further object of the present invention to utilize multiple sets of performance data, resulting in multiple concurrent alias assignment methods, and to manage contention among the multiple concurrent assignment methods.
It is a further object of the present invention to operate in a multi-host or sysplex environment, by sharing performance data among all hosts within the sysplex and providing methods to manage contention between multiple hosts.
The present invention manages parallel access to an I/O device enabled by the use of base and alias addressing. As noted previously, existing servers employing the channel subsystem architecture of the IBM ESA/390 server and other similar server systems known in the art limit each host image to a single I/O operation to any particular I/O device at any particular time. By assigning to each I/O device a fixed base address and a number of alias addresses, any host image can initiate multiple concurrent I/O requests to the base device by initiating one request to each address (base or alias) associated with the base device. The host image perceives and manages each request as a request to a different I/O device, thereby allowing the requests to execute in parallel. The direct access storage device (DASD) subsystem routes each request to the appropriate I/O device, and processes the requests in parallel to the extent possible. When the DASD subsystem is unable to process requests to a particular device in parallel, the requests are queued in the DASD subsystem. By managing the assignment of alias addresses to base I/O devices, the hosts are able to control the number of concurrent access requests possible for each I/O device. As noted, the total number of concurrent or parallel access requests available for a specific I/O device at any specific time is the total number of addresses (base plus alias) associated with that I/O device at that time.
In one embodiment of the present invention, data related to the performance of each I/O device is collected periodically by the attached host system. This I/O performance data is then analyzed to determine which I/O devices are performing poorly and are thus in need of additional alias addresses. Based on this analysis, the host systems will determine which alias addresses are to be reassigned from a donor device to a receiver device. The host system will issue appropriate instructions to the I/O subsystem (IOS), causing the I/O subsystem to implement the reassignment of the alias address from the specified donor to the specified receiver.
In other embodiments of the present invention, an alias will be reassigned to a receiver only after a determination is made that the reassignment will not have a significant adverse impact. Several methods are employed to make this determination. In one embodiment, alias addresses that are not currently bound to a base address are identified as donors. In another embodiment, performance data is used to identify I/O devices that are performing well, and are thus identified as donors. In a further embodiment, potential donors are identified by analyzing performance data, however an alias will only be assigned away from the donor if the host determines that the device performance will remain above a threshold level after the reassignment.
In another embodiment of the present invention, data related to the performance of service classes is collected periodically by the attached host system. This data is analyzed to identify service classes that are failing to meet their specified performance goals. Performance data is also collected regarding the relative performance of each I/O device. Additional data is collected regarding the utilization of each I/O device by each service class. This data is analyzed to identify I/O devices experiencing poor performance, and to correlate each I/O device to the service class utilizing the I/O device. For each instance where a class fails to meet one or more of its performance goal and the class is utilizing a poorly performing I/O device, the host system attempts to identify a donor device associated with a service class of lesser importance. If such a donor is identified, the host system issues appropriate instructions to the I/O subsystem, causing the I/O subsystem to implement the reassignment of the alias address from the specified donor to the specified receiver.
In a preferred embodiment of the present invention, multiple sets of performance data are collected and analyzed concurrently. Multiple analysis and reassignment methods are run concurrently on each set of performance data. Contention between concurrent reassignment methods is managed with two methods. First, a token is used to serialize alias reassignments, thus insuring that any particular alias can be moved by only one host system and only one reassignment method at any specific instant. Second, time stamping is utilized to limit the frequency with which any specific alias can be reassigned. Where multiple concurrent alias reassignment methods are in operation, one of the methods is designated as a dominant method, taking precedence over other subordinate methods. The dominant method is run more frequently than any subordinate methods. As the dominant method reassigns an alias, the base device associated with the reassigned alias is given a time stamp indicating the time at which the move occurred. Reassignment rules require a minimum xe2x80x9cwaitxe2x80x9d time before this base can have aliases added or removed, where the wait time exceeds the time between the reassignment by the dominant method and the time of analysis by the subordinate method. By thus utilizing a time stamp, the subordinate method will perceive an alias to be unavailable for reassignment if that alias is associated with a base address which was previously a donor or receiver of an alias during most recent cycle of the dominant method.
In preferred embodiments of the present invention, the environment is a multi-host or sysplex environment. In particular, this environment requires sharing of all performance data among all hosts within the sysplex, and methods to manage contention among the hosts.
In preferred embodiments of the present invention, the I/O device is a logical volume included in a storage device comprised of multiple logical volumes, and the base and alias addresses address logical volumes. In particular, for these embodiments data is collected regarding the relative performance of each logical volume (LV) comprising the I/O device.